Verification Methods Overview
A matching network should be verified at multiple stages: before PCB assembly (simulation with ideal values), after using real component models (simulation with real S-parameters), and after soldering (VNA measurement). Discrepancies at each stage reveal different failure modes.
Method 1: VNA S11 Measurement (Gold Standard)
- Assemble the matching network + DUT on PCB
- VNA SOLT calibration at PCB edge SMA connector
- Connect to matching network input → measure S11
- Target: S11 < −10 dB (VSWR < 1.92) across operating band
- Load .s1p measurement into RF View → Smith chart, BW, VSWR
Method 2: Circuit Simulation (Pre-Assembly)
RF View Circuit Simulator: 1. Add DUT as S2P block (load device manufacturer's .s2p) 2. Add matching elements: shunt C (ideal), series L (ideal) 3. Simulate → check S11 <−10 dB at target frequency Then switch to Real Match: 4. RF View substitutes ideal L/C with nearest Murata catalog values 5. Re-simulate → check if real component S11 still meets spec 6. Any degradation reveals component Q and SRF limitations
Method 3: Monte Carlo Yield Analysis
In Tolerance Analysis tab: - Set ±5% tolerance on L (standard SMD) - Set ±5% tolerance on C (C0G/NP0 recommended) - Run 200 iterations Yield pass criterion: S11 < −10 dB at 880–915 MHz Acceptable yield: ≥90% (typical production target) If yield < 90%: redesign with wider matching bandwidth Increase Q margin by using Pi/T-network (lower Q design)
Method 4: PCB Layout Effect Check
After VNA measurement, if S11 is worse than simulation:
| Symptom | Likely Cause | Fix |
|---|---|---|
| Resonance at unexpected frequency | Via inductance resonates with shunt C | Add more vias to shunt component |
| S11 shifted in frequency | PCB trace inductance adds to series L | Shorten trace, reduce L value slightly |
| Overall worse S11 | Ground plane discontinuity | Ensure solid ground below matching network |
| Frequency-specific dip | Component self-resonance (SRF) | Choose component with higher SRF |
RF View Verification Workflow: Use RF View's circuit simulator → Real Match → Monte Carlo to verify before assembly. After assembly, load VNA .s1p into RF View to compare against simulation. Free on Android.